Semiconductor devices are made using lithographic techniques. Current lithography process uses photons to transfer the device images on a mask (reticle) to a layer of photosensitive material, such as a photoresist, formed on a semiconductor wafer. As dimensions of semiconductor devices continue to shrink to sub-0.1 μm, new techniques, such as 193 nm and extreme ultraviolet (EUV) lithography as well as phase shift masks, are needed to meet manufacturing requirements. However, etch selectivity between photoresist and an underlying absorber structure of a mask, in which a pattern is being formed, is poor. Portions of the photoresist are removed while etching the absorber structure rendering the pattern in the absorber structure to be different than that desired.
To accommodate for the photoresist removal during the etch process a thick photoresist, which is approximately 300 to 400 nanometers, is used. While a thick photoresist may be suitable for some applications, it makes it difficult to pattern high resolution features due to their high aspect ratio and may lead to the photoresist collapsing. Additionally, when using a thick photoresist non-volatile etch by-products may deposit on features patterned in the thick photoresist to form “veils”, which are very difficult to remove. Thus, a need exists for a method to form high aspect ratio features when etching an absorber structure as part of a mask fabrication process.
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